US 2012/0256263 A1Published application

Semiconductor storage device and method of manufacturing the same

AssigneeKabushiki Kaisha Toshiba

InventorsDaina INOUE, Hidenobu Nagashima, Akira Yotsumoto

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Abstract

A semiconductor storage device includes an interlayer insulating film provided between select gate electrodes, a first fill material extending along upper portions of memory cell gate electrodes so as to cover air gaps residing between the memory cell gate electrodes, the first fill material extending along sidewalls of the select gate electrodes and sidewalls of the interlayer insulating film so as to define a recess above the first fill material extending along the sidewalls of the select gate electrodes and the sidewalls of the interlayer insulating film, a second fill material filling the recess above the first fill material, and a plurality of contacts formed through the interlayer insulating film, the contacts physically contacting each of device areas formed in a semiconductor substrate.

Claims13

Dependent claims

A semiconductor storage device, comprising:

a semiconductor substrate;
a plurality of device areas formed in the semiconductor substrate, the device areas being spaced from one another in a first direction and extending along a second direction orthogonal to the first direction;
a plurality of select gate electrodes formed in the device area via a gate insulating film, the select gate electrodes being aligned in the second direction;
a plurality of memory cell gate electrodes formed in the device area of the semiconductor substrate via the gate insulating film, the memory cell gate electrodes being aligned in the second direction with a first spacing therebetween;
an interlayer insulating film formed in a first region between the select gate electrodes, the interlayer insulating film having a sidewall spaced from the select gate electrode by a second spacing greater than the first spacing;
a first fill material formed in the first region and a second region between the memory cell gate electrodes, wherein the first fill material extends along upper portions of the memory cell gate electrodes in the second region so as to cover air gaps residing between the memory cell gate electrodes, and wherein the first fill material extends along the sidewalls of the select gate electrodes and the sidewalls of the interlayer insulating film in the first region, thereby defining a recess above the first fill material formed along the sidewalls of the select gate electrodes and the sidewalls of the interlayer insulating film;
a second fill material formed above the first fill material and filled in the recess above the first fill material;
and
a plurality of contacts formed through the interlayer insulating film, the contacts physically contacting each of the device areas.

6 more elements

A method of manufacturing a semiconductor storage device comprising:

forming a gate insulating film, a first gate electrode film, an intergate insulating film, and a second gate electrode film in the listed sequence above a semiconductor substrate;
anisotropically etching the second gate electrode film, the intergate insulating film, and the first gate electrode film to define a plurality of memory cell gate electrodes spaced from one another by a first spacing and a plurality of select gate electrodes;
forming a sacrificial film in a first region between the select gate electrodes, a second region between the memory cell gate electrodes, and a third region between the select gate electrode and the memory cell gate electrode;
anistropically etching the sacrificial film in the first region to form an opening in a central portion thereof, while leaving the sacrificial film in the second region and the third region;
forming an interlayer insulating film within the opening;
etching an upper surface of the interlayer insulating film so as to be lower than an upper surface of the second gate electrode film and higher than an upper surface of intergate insulating film and so as to separate sidewalls of the interlayer insulating film and sidewalls of the select gate electrode by a first spacing greater than a second spacing between the memory cell gate electrodes;
removing the sacrificial film from the second region, the third region, and between the interlayer insulating film and the select gate electrode;
forming a first fill material along upper portions of the memory cell gate electrodes so as to cover air gaps residing between the memory cell gate electrodes and along the sidewalls of the select gate electrodes and the sidewalls of the interlayer insulating film, thereby defining a recess above the first fill material formed along the sidewalls of the select gate electrodes and the sidewalls of the interlayer insulating film;
filling the recess with a second fill material being formed in a condition having a better gap filling capability than the first fill material;
forming a plurality of contact holes through the interlayer insulating film to expose the semiconductor substrate, and
forming a contact within each of the contact holes.

8 more elements

Dependencies are inferred from the claim text.