Bch decoding with multiple sigma polynomial calculation algorithms

An apparatus, comprising:

• a storage device interface to receive a codeword from a storage device;
• a BCH decoder to locate bit errors in the codeword, wherein the BCH decoders further comprises:
• a first engine to calculate, by a first algorithm, an error locator polynomial from a BCH syndrome of the codeword;
• and
• a second engine to calculate, by a second algorithm, an error locator polynomial from the BCH syndrome of the codeword;
• and
• a host interface to pass data based on the codeword to a host device.

A method for correcting errors in a codeword, the method comprising:

• receiving a BCH syndrome of the codeword;
• calculating an error locator polynomial by processing the BCH syndrome with at least one of a first algorithm and a second algorithm depending on a number of errors detected from the BCH syndrome exceeding a threshold;
• and
• calculating a bit error location by determining roots of the error locator polynomial.

A system, comprising:

• a host device having a first antenna;
• a storage device interface to receive a codeword from a storage device;
• a BCH decoder to locate bit errors in the codeword, wherein the BCH decoders further comprises:
• a first engine to calculate, by a first algorithm, an error locator polynomial from a BCH syndrome of the codeword;
• and
• a second engine to calculate, by a second algorithm, an error locator polynomial from the BCH syndrome of the codeword;
• and
• a second antenna to pass data based on the codeword to the host device.