Apparatus and method for determining a read level of a flash memory after an inactive period of time
AssigneeSTEC, Inc.
InventorsAldo G. COMETTI, Lun Bin Huang, Ashot Melik-Martirosian
Life of this patent
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AssigneeSTEC, Inc.
InventorsAldo G. COMETTI, Lun Bin Huang, Ashot Melik-Martirosian
Estimating the term…
Disclosed is an apparatus and method for determining a dwell time in a non-volatile memory circuit after a shutdown of the memory circuit. A voltage shift is calculated by comparing a first read level voltage required to read a test block stored before the shutdown and a second read level voltage required to read a second test block stored after the shutdown. A shutdown time is determined from a look up table indexed by the voltage shift and a number of program/erase cycles. The dwell time is calculated as a function of the drive temperature, a clock, and a block time stamp. Once the dwell time is calculated, a controller calculates a new read level voltage based, in part, on the dwell time and provides one or more programming commands representative of the new read level voltage to the memory circuit to read the memory circuit.
A machine-readable medium including machine-executable instructions for a method of determining a dwell time in a memory circuit after a shutdown of the memory circuit, comprising:
A control circuit for determining a dwell time in a memory circuit after a shutdown of the memory circuit, comprising:
A system for determining a dwell time in a memory circuit after a shutdown of the memory circuit, comprising:
Dependencies are inferred from the claim text.