US 2012/0238096 A1 · METHOD AND APPARATUS FOR INSPECTING A REFLECTIVE LITHOGRAPHIC MASK BLANK AND IMPROVING MASK QUALITY

Abstract

An EUV integrated circuit fabrication method and system EUV that includes blank inspection, defect characterization, simulation, pattern compensation, modification of the mask writer database, inspection and simulation of patterned masks, and patterned mask repair. The system performs blank inspection to identify defects at multiple focal planes within the blank. The mask can be relocated on the blank and alterations to the pattern can be developed to compensate for the defects prior to prior to patterning the mask. Once the mask has been patterned, the reticle is inspected to identify any additional or remaining defects that were not picked up during blank inspection or fully mitigated through pattern compensation. The patterned reticle can then be repaired prior to integrated circuit fabrication.

Claims24

Dependent claims

A method for manufacturing integrated circuit wafers with an extreme ultraviolet lithographic (EUV) fabrication system, comprising the steps of:

obtaining an EUV mask blank;
locating a nominal mask on an area of the blank, the nominal mask comprising a pattern configured for printing an absorber to create absorptive traces on the blank for creating a reticle for etching an integrated circuit onto one or more wafers;
inspecting the blank in the area of the nominal mask at multiple focal planes within the blank;
identifying a defect in the blank in the area of the nominal mask;
characterizing the defect as to size and location;
mapping the defect to create a defect map for the blank;
simulating the integrated circuit using the nominal mask and the defect map for the blank;
designing a compensated mask to mitigate the effect of the defect in the blank;
simulating the integrated circuit using the compensated mask and the defect map for the blank;
printing the compensated mask on the blank to create a reticle.

7 more elements

An EUV integrated circuit fabrication system comprising:

a multi-layer inspection station configured for imaging an EUV mask blank at multiple focal planes within the blank, identifying and characterizing a defect in the blank, and creating a map of the defect in the blank;
a pattern mask design system configured for designing a nominal mask for printing a reticle for etching an integrated circuit;
a lithographic simulator configured for simulating an integrated circuit based on the nominal mask and the map of the defect in the blank;
the pattern mask design system further configured for designing a modification to the nominal mask to create a compensated mask for mitigating the defect in the blank;
the lithographic simulator further configured for simulating the integrated circuit based on the nominal mask and the map of the defect in the blank;
a pattern mask data base configured for storing the nominal mask and the compensated mask;
a pattern mask writer configured for printing an absorber to create traces on the blank corresponding to the compensated mask for creating a reticle for etching an integrated circuit onto one or more wafers;
and
a wafer fabricator configured for etching the integrated circuit onto one or more wafers using the reticle.

6 more elements

Dependencies are inferred from the claim text.

Method and apparatus for inspecting a reflective lithographic mask blank and improving mask quality

Life of this patent

Method and apparatus for inspecting a reflective lithographic mask blank and improving mask quality

Life of this patent

Abstract

Claims24