Semiconductor having a high aspect ratio via

A method comprising:

• providing a first substrate bonded to a second substrate, wherein the first substrate has an interconnect structure that includes a conductive interconnect layer, wherein a cavity in the first substrate exposes the conductive interconnect layer;
• and
• forming a via structure that electrically couples the first substrate to the second substrate, wherein the forming the via structure includes:
• forming a via hole that extends through the second substrate, such that the via hole and the cavity in the first substrate combine to form a via, wherein a via sidewall of the via is defined by the second substrate and a via bottom wall of the via is defined by the conductive interconnect layer,
• forming an oxide layer over a portion of the via sidewall, and
• after forming the oxide layer over the portion of the via sidewall, filling the via with a conductive layer.

A method of forming a via in a semiconductor device, the method comprising:

• providing a semiconductor wafer;
• forming a cavity in the semiconductor wafer;
• providing a top wafer and bonding the top wafer to the semiconductor wafer;
• etching a via through the top wafer to the cavity;
• depositing an oxide layer on sidewalls of the via;
• etching the oxide layer to remove the oxide layer from a bottom surface of the via and also from an upper portion of the sidewalls of the via;
• depositing a barrier film in the via, inward of the oxide layer;
• filling the via with a conductive film;
• and
• depositing a top barrier film on the top wafer, the oxide layer, the barrier film, and the conductive film.