Semiconductor device

A semiconductor device comprising:

• first and second memory cell arrays arranged side by side in a first direction, each of said first and said second memory cell arrays comprising a memory cell mat that includes a word line and a bit line, a sub-word driver circuit that drives said word line, and a first control unit that controls said sub-word driver circuit;
• and
• a first region that is disposed between said first memory cell array and said second memory cell array, and that includes a second control unit that controls said sub-word driver circuit;
• wherein
• said first control unit has a first circuit unit;
• said second control unit includes a third circuit unit that operates at a first power supply voltage having a first power supply potential as a low potential side and a fourth circuit unit that operates at a second power supply voltage having a second power supply potential lower than said first power supply potential as a low potential side, supplies a first control signal to said sub-word driver circuit, and supplies a second control signal to said first circuit unit of said first control unit;
• said first circuit unit of said first control unit operates at a third power supply voltage having said second power supply potential as a low potential side without receiving said first power supply potential, receives said second control signal, and supplies a third control signal to said sub-word driver circuit;
• and
• said sub-word driver circuit receives said first control signal and said third control signal, and nonlinearly deactivates said word line of an active state.