Electrostatic discharge protection circuit for compound semiconductor devices and circuits

An electrostatic discharge (ESD) protection circuit, comprising:

• a first terminal and a second terminal;
• a transistor shunt element operably coupled between the first terminal and the second terminal, the transistor shunt element to provide a discharge path between the first terminal and the second terminal for both a positive discharge event and a negative discharge event, wherein the transistor shunt element is an enhancement-mode compound semiconductor field effect transistor;
• and
• a shut-off element operably coupled with the second terminal, the shut-off element capable of keeping the transistor shunt element turned-off,
• wherein the ESD protection circuit is fabricated using a high electron mobility transistor (HEMT) technology.

A semiconductor device for providing electrostatic discharge (ESD) protection to an integrated circuit, the device comprising:

• a first terminal and a second terminal, wherein the first terminal is capable of being operably coupled with the integrated circuit and the second terminal is capable of being operably coupled with a ground;
• a transistor shunt element operably coupled between the first terminal and the second terminal, the transistor shunt element to provide a discharge path to dissipate both a positive ESD event and a negative ESD event, wherein the transistor shunt element is an enhancement-mode compound semiconductor field effect transistor;
• a shut-off element operably coupled with the second terminal, the shut-off element capable of keeping the transistor shunt element turned-off;
• and
• a series element operably coupled between the transistor shunt element and the shut-off element, the series element capable of limiting current into a gate of the transistor shunt element,
• wherein the ESD protection circuit is fabricated using a high electron mobility transistor (HEMT) technology.

A method for providing electrostatic discharge (ESD) protection for an integrated circuit, the method comprising:

• detecting a voltage at a first terminal of an ESD protection circuit;
• turning-on a triggering element of the ESD protection circuit in response to the detection of the voltage;
• turning-on a transistor shunt element of the ESD protection circuit in response to the triggering element turning-on;
• and
• providing a discharge path between the first terminal to a second terminal via the transistor shunt element, to dissipate both a positive ESD event and a negative ESD event), wherein the transistor shunt element is an enhancement-mode compound semiconductor field effect transistor,
• wherein the ESD protection circuit is fabricated using a high electron mobility transistor (HEMT) technology.