Driving method for obtaining a gain linear variation of a transconductance amplifier and correspondence driving circuit

A transconductance system comprising:

• a transconductance amplifier that includes a first differential transistor cell;
• and
• a driving circuit that includes:
• a driving terminal;
• first and second voltage reference terminals;
• a feedback block coupled between the first voltage reference terminal and first and second feedback circuit nodes;
• a biasing block coupled between the second voltage reference terminal and first and second degenerative circuit nodes;
• a second differential transistor cell that includes a first transistor electrically coupled between the first feedback circuit node and the first degenerative circuit node, a second transistor electrically coupled between the second feedback circuit node and the second degenerative circuit node, a degenerative resistance electrically coupled between the first and second degenerative circuit nodes, and a degenerative driving transistor electrically coupled in parallel to the degenerative resistance between said degenerative circuit nodes, said degenerative driving transistor having a control terminal electrically coupled to the driving terminal;
• and
• a comparison block electrically coupled between said first and second voltage reference terminals and electrically coupled to said driving terminal, the comparison block being configured to receive an output current that is proportional to a transconductance value of the second differential transistor cell, and provide a controlled driving voltage cell on said driving terminal that is based on a comparison of the output current with a reference current.

A driving circuit for driving a transconductance amplifier, the driving circuit comprising:

• a driving terminal;
• first and second voltage reference terminals;
• a feedback block coupled between the first voltage reference terminal and first and second feedback circuit nodes;
• a biasing block coupled between the second voltage reference terminal and first and second degenerative circuit nodes;
• a second differential transistor cell that includes a first transistor electrically coupled between the first feedback circuit node and the first degenerative circuit node, a second transistor electrically coupled between the second feedback circuit node and the second degenerative circuit node, a degenerative resistance electrically coupled between the first and second degenerative circuit nodes, and a degenerative driving transistor electrically coupled in parallel to the degenerative resistance between said degenerative circuit nodes, said degenerative driving transistor having a control terminal electrically coupled to the driving terminal;
• and
• a comparison block electrically coupled between said first and second voltage reference terminals and electrically coupled to said driving terminal, the comparison block being configured to receive an output current that is proportional to a transconductance value of the second differential transistor cell, and provide a controlled driving voltage cell on said driving terminal that is based on a comparison of the output current with a reference current.