Methods of accessing memory cells, methods of distributing memory requests, systems, and memory controllers
AssigneeMicron Technology, Inc.
InventorRobert Walker
Life of this patent
Estimating the term…
Abstract
Methods of accessing memory cells, methods of distributing memory requests, systems, and memory controllers are described. In one such method, where memory cells are divided into at least a first region of memory cells and a second region of memory cells, memory cells in the first region are accessed according to a first address definition and memory cells in the second region are accessed according to a second address definition that is different from the first address definition. Additional embodiments are described.
Claims41
A method of accessing memory cells, wherein the cells are divided into at least a first region and a second region, the method comprising:
- accessing a memory cell in the first region according to a first address definition;
- and
- accessing a memory cell in the second region according to a second address definition, the second address definition being different from the first address definition.
A method comprising;
- receiving a memory request;
- and
- distributing the memory request across a plurality of channels of memory cells based on a size of the memory request and a definition of the channels.
A method comprising:
- accessing memory cells in a first region of a memory system with all of a plurality of classes of address, wherein a selected one of the classes of address has a first address definition;
- and
- accessing memory cells in a second region of the memory system with all of the classes of address, wherein the selected class of address has a second address definition that is different from the first address definition.
A method comprising:
- accessing data in a first region of memory cells of a memory system, wherein the memory cells of the memory system are divided into channels, each channel comprising a plurality of memory cells;
- and
- accessing data in a second region of memory cells of the memory system wherein a number of bytes accessed per channel before going to a next channel in the first region is different than a number of bytes accessed per channel before going to a next channel in the second region.
A method comprising:
- receiving data in a memory request from a master;
- writing the data to a first region of memory cells of a memory system if the master is of a first type;
- and
- writing the data to a second region of memory cells of the memory system if the master is of a second type.
A system comprising:
- a pre-decode block to:
- receive a request address associated with a memory request corresponding to memory cells in a memory system;
- rearrange the request address into a first memory address according to a first definition if the request address corresponds to memory cells in a first region of the memory system;
- and
- rearrange the request address into a second memory address according to a second definition if the request address corresponds to memory cells in a second region of the memory system, the second definition being different from the first definition;
- and
- a memory controller configured to receive the first or the second memory address and to execute at least a portion of the memory request in the memory system.
A method comprising:
- receiving a request address associated with a memory request from a master in a pre-decode block;
- determining a region of a memory system to which the request address is directed;
- rearranging digits of the request address into a first memory address according to a first definition if the request address corresponds to memory cells in a first region of the memory system;
- and
- rearranging the digits of the request address into a second memory address according to a second definition if the request address corresponds to memory cells in a second region of the memory system, the second definition being different from the first definition.
A system comprising a plurality of memory cells divided into at least first and second regions, wherein an address definition of the first region is different than an address definition of the second region.
A memory controller configured to execute memory requests in a memory system, wherein the memory controller includes a memory map that divides memory cells in the memory system into a plurality of regions, wherein each of the regions has its own address definition.
Dependencies are inferred from the claim text.