Memory controller and a controlling method adaptable to dram
AssigneeSkymedi Corporation
InventorHsingho Liu
Life of this patent
Estimating the term…
Abstract
A memory controller and controlling method adaptable to a dynamic random access memory (DRAM) are disclosed. A DRAM controller is configured to manage flow of data to and from the DRAM. A write buffer is controlled by the DRAM controller to temporarily store an entry of data to be written to the DRAM. The data to be written is stored in the write buffer if the write buffer is empty, and the stored data and a succeeding data to be written are both written to the DRAM.
Claims16
A memory controller adaptable to a dynamic random access memory (DRAM), comprising:
- a DRAM controller configured to manage flow of data to and from the DRAM;
- and
- a write buffer controlled by the DRAM controller to temporarily store an entry of data to be written to the DRAM;
- wherein the data to be written is stored in the write buffer if the write buffer is empty, and the stored data and a succeeding data to be written are both written to the DRAM.
A memory controlling method adaptable to a dynamic random access memory (DRAM), comprising:
- managing flow of data to and from the DRAM by a DRAM controller;
- providing a write buffer to temporarily store an entry of data to be written to the DRAM;
- storing the data to be written in the write buffer if the write buffer is empty;
- and
- writing both the stored data and a succeeding data to be written to the DRAM.
Dependencies are inferred from the claim text.