Remapping for memory wear leveling

A remapping apparatus, used for wear leveling and implemented as logic, wherein a memory (10) receives translated physical addresses for certain memory operations, the translated physical addresses providing a leveling of use of areas of the memory, comprising:

• an address parsing function that divides a logical address (20) into logical block (22), line (24), and subline (26) address portions;
• a block remap table (32) that performs a block remapping to produce a physical block address (23);
• a line remap table (35) that provides a line remap key (33) to perform a line remapping within a block of a same block size that the block remapping is performed;
• a line remap function (34) that receives the key (33) and produces a physical line address (25);
• a subline translation device that produces a physical subline address (26) based on the logical subline address portion;
• and
• a physical address function that produces a physical address (28) based on the physical block, line, and subline addresses, wherein the physical address designates the location in the memory for a memory operation.