Tracking written addresses of a shared memory of a multi-core processor
AssigneeLSI Corporation
InventorsDavid Sonnier, Chris Randall Stone, Charles Edwards Peet, JR.
Life of this patent
Estimating the term…
Loading patent…
AssigneeLSI Corporation
InventorsDavid Sonnier, Chris Randall Stone, Charles Edwards Peet, JR.
Estimating the term…
Described embodiments provide a method of controlling processing flow in a network processor having one or more processing modules. A given one of the processing modules loads a script into a compute engine. The script includes instructions for the compute engine. The given one of the processing modules loads a register file into the compute engine. The register file includes operands for the instructions of the loaded script. A tracking vector of the compute engine is initialized to a default value, and the compute engine executes the instructions of the loaded script based on the operands of the loaded register file. The compute engine updates corresponding portions of the register file with updated data corresponding to the executed script. The tracking vector tracks the updated portions of the register file. The compute engine provides the tracking vector and the updated register file to the given one of the processing modules.
A method of controlling processing flow in a network processor having one or more processing modules, the method comprising:
A non-transitory machine-readable medium, having encoded thereon program code, wherein, when the program code is executed by a machine, the machine implements a method of controlling processing flow in a network processor having one or more processing modules, the method comprising:
A network processor comprising:
Dependencies are inferred from the claim text.