Hierarchical Memory Addressing
AssigneeNVIDIA Corporation
InventorWilliam James Dally
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AssigneeNVIDIA Corporation
InventorWilliam James Dally
Estimating the term…
One embodiment of the present invention sets forth a technique for addressing data in a hierarchical graphics processing unit cluster. A hierarchical address is constructed based on the location of a storage circuit where a target unit of data resides. The hierarchical address comprises a level field indicating a hierarchical level for the unit of data and a node identifier that indicates which GPU within the GPU cluster currently stores the unit of data. The hierarchical address may further comprise one or more identifiers that indicate which storage circuit in a particular hierarchical level currently stores the unit of data. The hierarchical address is constructed and interpreted based on the level field. The technique advantageously enables programs executing within the GPU cluster to efficiently access data residing in other GPUs using the hierarchical address.
A method for accessing a unit of data stored within a unified memory associated with a hierarchical computation system, the method comprising:
A computer-readable storage medium including instructions that, when executed by a processing unit, cause the processing unit to access a unit of data stored within a unified memory associated with a hierarchical computation system, the method comprising:
A computing device comprising:
Dependencies are inferred from the claim text.