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US 2012/0074581 A1Published application
Die-stacking using through-silicon vias on bumpless build-up layer substrates including embedded-dice, and processes of forming same
AssigneeIntel Corporation
InventorsJohn S. Guzek, Ravi K. Nalla, Javier Soto Gonzalez, Drew Delaney, Suresh Pothukuchi, Mohit Mamodia, Edward Zarbock, Johanna M. Swan
Life of this patent
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Abstract
An apparatus includes a coreless substrate with a through-silicon via (TSV) embedded die that is integral to the coreless substrate. The apparatus includes a subsequent die that is coupled to the TSV die and that is disposed above the coreless substrate.
Claims42
An apparatus, comprising:
- a die including a through-silicon via disposed therein (TSV die);
- wherein the TSV die is embedded in a coreless substrate, wherein the coreless substrate includes a land side and a die side;
- wherein the TSV die includes an active surface and a backside surface;
- and
- wherein the active surface is closer to the die side than to the land side.
2 more elements
A process comprising:
- forming at least one die with a through-silicon via (TSV die) in a coreless substrate, wherein the TSV die includes an active surface and a backside surface, and wherein the coreless substrate includes a die side and a land side;
- and
- coupling the TSV die to a subsequent die through at TSV in the TSV die, wherein the backside surface is closer to the die side than the land side.
A computing system, comprising:
- a die including a through-silicon via disposed therein (TSV die);
- wherein the TSV die is embedded in a coreless substrate, wherein the coreless substrate includes a land side and a die side;
- wherein the TSV die includes an active surface and a backside surface;
- and
- wherein the active surface is closer to the die side than to the land side;
- and
- a foundation substrate coupled to the TSV die.
4 more elements
Dependencies are inferred from the claim text.