Semiconductor device and method for manufacturing same

A semiconductor device, comprising:

• a first semiconductor layer having a first conductivity type;
• a second semiconductor layer provided on the first semiconductor layer and including first pillars of the first conductivity type and second pillars of a second conductivity type, the first pillars and the second pillars being provided alternately along a major surface of the first semiconductor layer;
• a first control electrode provided in a trench via a first insulating layer, the trench being provided in a direction from a surface of the second semiconductor layer toward the first semiconductor layer;
• first semiconductor regions of the second conductivity type provided on the second pillars and dotted over the second semiconductor layer;
• a second control electrode provided on the second semiconductor layer via a second insulating layer and connected to the first control electrode, the second control electrode having a plurality of openings, each of the openings being in communication with the first semiconductor region;
• a second semiconductor region of the first conductivity type provided selectively on a surface of the first semiconductor region in a bottom surface of the opening;
• a third semiconductor region of the second conductivity type provided selectively on the first semiconductor region by neighboring the second semiconductor region;
• a first major electrode connected electrically to the first semiconductor layer;
• and
• a second major electrode connected electrically to the second semiconductor region and the third semiconductor region.

A method for manufacturing a semiconductor device including a first semiconductor layer and a second semiconductor layer comprising:

• forming a conductive layer via an insulating layer on the second semiconductor layer provided with a trench, the second semiconductor layer being provided on the first semiconductor layer of a first conductivity type, the second semiconductor layer including first pillars of the first conductivity type and second pillars of a second conductivity type, the first pillars and the second pillars being provided alternately in a direction along a major surface of the first semiconductor layer;
• forming a first control electrode embedded within the trench and a second control electrode on the second semiconductor layer by selectively etching the conductive layer, the first control electrode and the second control electrode being connected to each other;
• forming a first semiconductor region of the second conductivity type on a surface of the second semiconductor layer in a region except a portion under the second control electrode;
• selectively forming a second semiconductor region of the first conductivity type on a surface of the first semiconductor region;
• selectively forming a third semiconductor region of the second conductivity type provided on the surface of the first semiconductor region neighboring the second semiconductor region;
• forming a first major electrode connected electrically to the first semiconductor layer;
• and
• forming a second major electrode connected electrically to the second semiconductor region and the third semiconductor region.