Multiple edge enabled patterning

A semiconductor device, comprising:

• a first pattern formed on a semiconductor wafer, the first pattern extending in a first direction;
• a second pattern formed on the wafer, the second pattern extending in the first direction and being separated from the first pattern by a first distance measured in a second direction perpendicular to the first direction;
• and
• a third pattern formed on the wafer, the third pattern being separated from the first pattern by a second distance measured in the first direction, the third pattern being separated from the second pattern by a third distance measured in the first direction;
• wherein:
• the first distance is approximately equal to the third distance;
• and
• the second distance is less than twice the first distance.

A method, comprising:

• forming a first pattern on a wafer, the first pattern extending in a first direction;
• forming a second pattern on the wafer, the second pattern extending in the first direction and being separated from the first pattern by a first distance measured in a second direction perpendicular to the first direction;
• and
• forming a third pattern on the wafer, the third pattern being separated from the first pattern by a second distance measured in the first direction, the third pattern being separated from the second pattern by a third distance measured in the first direction;
• wherein:
• the first distance is approximately equal to the third distance;
• and
• the second distance is less than twice the first distance.