Memory element having elastically deformable active region

A multilayer structure comprising:

• a via array comprising a set of first vias and a set of second vias;
• a CMOS layer to selectively address the set of first vias and the set of second vias;
• at least two crossbar arrays configured to overlie the CMOS layer and communicate with at least one of the first vias and the second vias, each of the at least two crossbar arrays intersect at a plurality of intersections;
• and
• memory elements configured to be interposed at the intersections, wherein each memory element comprises:
• a first electrode;
• a second electrode;
• and
• an active region disposed between the first electrode and the second electrode, wherein at least a portion of the active region comprises an elastically deformable material, and wherein deformation of the elastically deformable material causes said memory element to change from a lower conductive state to a higher conductive state.