Integrated circuit
AssigneeKabushiki Kaisha Toshiba
InventorsYoshiyuki Kondo, Shigeru Kawanaka
Life of this patent
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Abstract
In accordance with an embodiment, an integrated circuit includes a first spin transistor and a second spin transistor. The first spin transistor has a first channel length. The first spin transistor includes a first node and a second node apart from the first node The second spin transistor is connected to the first transistor in series and has a second channel length different from the first channel length. The second spin transistor includes a third node and a fourth node apart from the third node The second node and the fourth node are electrically connected to each other.
Claims20
An integrated circuit comprising:
- a first spin transistor having a first channel length, the first spin transistor comprising a first node and a second node apart from the first node;
- and
- a second spin transistor which is connected to the first spin transistor in series and which has a second channel length different from the first channel length, the second spin transistor comprising a third node and a fourth node apart from the third node,
- wherein the second node and the fourth node are electrically connected to each other.
An integrated circuit comprising:
- a first spin transistor, the first spin transistor comprising a first node supplied with a first voltage, a second node apart from the first node, a first channel region between the first node and the second node with a first channel length, and a first gate electrode;
- and
- a second spin transistor configured to share the second node of the first spin transistor with the first spin transistor, the second spin transistor comprising a third node supplied with a second voltage, a second channel region between the second node and the third node with a second channel length different from the first channel length, and a second gate electrode.
Dependencies are inferred from the claim text.