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US 2012/0057410 A1Published application
Method and Apparatus for the Erase Suspend Operation
AssigneeMacronix International Co., Ltd.
InventorsChuan-Ying Yu, Ken-Hui Chen, Chun-Hsiung Hung, Kuen-Long Chang
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Abstract
Various aspects of a nonvolatile memory have an improved erase suspend procedure. A bias arrangement is applied to word lines of an erase sector undergoing an erase procedure interrupted by an erase suspend procedure. As a result, another operation performed during erase suspend, such as a read operation or program operation, has more accurate results due to decreased leakage current from any over-erased nonvolatile memory cells of the erase sector.
Claims20
An apparatus, comprising:
- a memory array of an integrated circuit, including a plurality of erase sectors of nonvolatile memory cells;
- a plurality of word lines accessing the nonvolatile memory cells;
- and
- control logic of the integrated circuit,
- wherein the control logic is responsive to an erase command by performing a multi-phase erase procedure on an erase sector of the plurality of erase sectors of the memory array, and
- wherein the control logic is responsive to an erase suspend command by performing an erase suspend procedure suspending the multi-phase erase procedure and allowing a non-erase command to perform a non-erase procedure on the memory array, and the erase suspend procedure applies a bias arrangement to at least one of the plurality of word lines accessing the erase sector during the non-erase procedure, the bias arrangement decreasing leakage from over-erased nonvolatile memory cells of the erase sector.
3 more elements
A method, comprising:
- performing an erase suspend procedure on a memory array of the integrated circuit, by suspending a multi-phase erase procedure of an erase sector of the memory array;
- performing a non-erase procedure on the memory array;
- and
- applying a bias arrangement to at least one word line accessing the erase sector during the non-erase procedure, the bias arrangement decreasing leakage from over-erased nonvolatile memory cells of the erase sector.
1 more element
Dependencies are inferred from the claim text.