Memory array with write feedback

A memory array with write feedback, the memory array comprising:

• a number of row lines intersecting a number of column lines;
• memory elements connected between said row lines and said column lines;
• an electrical condition supply to be selectively connected to said row lines;
• a sensor to be selectively connected to said column lines;
• and
• a comparator with a first input to receive an output signal from said sensor and a second input to receive a reference signal, an output of said comparator connected to said electrical condition supply.

A method for setting the state of a memory element within a memory array, the method comprising:

• applying an electrical condition to said memory element within said memory array;
• sensing a resistive state of said memory element;
• and
• controlling said electrical condition based on said sensed resistive state to cause said memory element to reach a target resistance.