Methods of forming semiconductor device and semiconductor devices formed by the same
AssigneeElectronics and Telecommunications Research Institute
InventorKunsik Park
Life of this patent
Estimating the term…
Abstract
Provided are a method of forming a semiconductor device including a via and a semiconductor device formed by the same. In the method, by forming an unseeded layer that covers a seed layer disposed on a substrate and at a side wall of a via hole, exposes the seed layer disposed at a bottom of the via hole, and cannot serve as a seed, a plated layer configuring the via is formed upward from the seed layer in a bottom-up growth process, and thus, a void is not formed. Also, an inlet of the via hole is not blocked by using the bottom-up growth process, and thus, an electroplating speed can increase, thereby shortening a time taken in filling the via hole with a metal.
Claims11
A method of forming a semiconductor device, the method comprising:
- forming a via hole in a substrate;
- forming a seed layer at least on a bottom and side wall of the via hole and the substrate;
- forming an unseeded layer which covers the seed layer disposed at the side wall of the via hole, exposes the seed layer disposed at the bottom of the via hole, and does not serve as a seed;
- and
- growing a plated layer from the exposed seed layer to fill the via hole by performing a plating process.
A semiconductor device comprising:
- a substrate;
- a via formed in the substrate;
- a seed layer disposed between the substrate and the via;
- and
- an unseeded layer disposed between the seed layer and the via, wherein the unseeded layer does not function as a seed.
A semiconductor device comprising:
- a substrate;
- a via formed in the substrate;
- and
- a seed layer disposed between the substrate and the via,
- wherein the via comprises:
- a first plated layer having a top which is disposed at a height lower than a top of the substrate, and not contacting a top of the seed layer;
- and
- a second plated layer disposed on the first plated layer, and contacting an upper side wall of the first plated layer and covering a top of the first plated layer.
Dependencies are inferred from the claim text.