Back to results
US 2011/0299004 A1Published application
Array substrate and manufacturing method thereof
AssigneeBeijing Boe Optoelectronics Technology Co., Ltd.
InventorsXiang LIU, Seongyeol YOO, Jianshe XUE
Life of this patent
Estimating the term…
Abstract
An array substrate comprises: a base substrate; a gate scanning line, a data scanning line, a pixel electrode and a thin film transistor, formed on the base substrate; and a light blocking layer, formed on the base substrate and corresponding to the thin film transistor and the data scanning line.
Claims20
An array substrate, comprising:
- a base substrate;
- a gate scanning line, a data scanning line, a pixel electrode and a thin film transistor, formed on the base substrate;
- and
- a light blocking layer, formed on the base substrate and corresponding to the thin film transistor and the data scanning line.
1 more element
A method of manufacturing an array substrate, comprising:
- forming a light blocking layer on a base substrate;
- depositing a first insulating layer on the base substrate on which the light blocking layer has been formed;
- forming an active thin film pattern on the first insulating layer;
- forming a source electrode and a drain electrode of a thin film transistor, a data scanning line connected to the source electrode and a pixel electrode connected to the drain electrode on the base substrate on which the active thin film pattern has been formed, the thin film transistor and the data scanning line corresponding to the light blocking layer;
- depositing a second insulating layer on the base substrate on which the pixel electrode, the data scanning line, the source and the drain have been formed;
- and
- forming a gate electrode of the thin film transistor corresponding to the active thin film pattern and a gate scanning line connected to the gate electrode on the base substrate on which the second insulating layer has been deposited.
4 more elements
A method of manufacturing an array substrate, comprising:
- forming a gate electrode of the thin film transistor and a gate scanning line connected to the gate electrode on a base substrate;
- depositing a first insulating layer on the base substrate on which the gate electrode and the gate scanning line have been formed;
- forming an active thin film pattern corresponding to the gate electrode on the first insulating layer;
- forming a source electrode and a drain electrode of the thin film transistor, a data scanning line connected to the source electrode and a pixel electrode connected to the drain electrode on the base substrate on which the active thin film pattern is formed;
- depositing a second insulating layer on the base substrate on which the pixel electrode, the data scanning line, the source electrode and the drain electrode are formed;
- and
- forming a light blocking layer corresponding to the thin film transistor and the data scanning line on the base substrate on which the second insulating layer has been deposited.
4 more elements
Dependencies are inferred from the claim text.