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US 2011/0298514 A1Published application
Pwm signal generator for digital controlled power supply
AssigneeSTMicroelectronics S.r.l.
InventorThomas L. Hopkins
Life of this patent
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Abstract
A forward converter circuit includes a transformer having a primary winding and a secondary winding. A first transistor is coupled in series with the primary winding and a second transistor is coupled in series with the secondary winding. A control circuit generates PWM control signals for controlling operation of the first and second transistors. The control signals are generated responsive to source PWM signals processed through programmable delay timers to generate set/reset control signals which set an output PWM control signal duty cycle.
Claims23
A circuit, comprising:
- a first signal generator adapted to generate a first PWM source signal;
- a logic circuit adapted to generate a first PWM control signal from the first PWM source signal;
- a first delay circuit adapted to delay a first edge of the first PWM control signal by a programmable first delay and produce a first delayed PWM control signal;
- a second delay circuit adapted to delay a second edge of the first PWM control signal by a programmable second delay and produce a second delayed PWM control signal;
- and
- a first set/reset circuit having a set input coupled to receive the first delayed PWM control signal and a reset input coupled to receive the second delayed PWM control signal, the first set/reset circuit further having an output generating a first PWM output control signal having a duty cycle controlled by the delayed first edge in the first delayed PWM control signal and the delayed second edge in the second delayed PWM control signal.
3 more elements
A circuit, comprising:
- a circuit adapted to generate a PWM control signal;
- a first delay circuit adapted to delay a rising edge of the PWM control signal by a programmable first delay to generate a first delayed PWM control signal having a first edge;
- a second delay circuit adapted to delay a falling edge of the PWM control signal by a programmable second delay to generate a second delayed PWM control signal having a second edge;
- and
- a set/reset circuit having a set input coupled to receive the first delayed PWM control signal and a reset input coupled to receive the second delayed PWM control signal, the set/reset circuit further having an output generating a PWM output control signal having a duty cycle controlled by the first edge of the first delayed PWM control signal and the second edge of the second delayed PWM control signal.
2 more elements
A circuit, comprising:
- a first delay circuit adapted to delay a PWM control signal by a programmable first delay to generate a first delayed PWM control signal having a first edge;
- a second delay circuit adapted to delay the PWM control signal by a programmable second delay to generate a second delayed PWM control signal having a second edge;
- and
- a PWM signal generation circuit having a first input coupled to receive the first delayed PWM control signal and a second input coupled to receive the second delayed PWM control signal, the PWM signal generation circuit further having an output, the PWM signal generation circuit setting the output to a first logic state in response to the first edge of the first delayed PWM control signal and setting the output to a second logic state in response to the second edge of the second delayed PWM control signal.
1 more element
Dependencies are inferred from the claim text.