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US 2011/0298057 A1Published application
Semiconductor device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorKiyoshi KATO
Life of this patent
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Abstract
An object is to provide a semiconductor device having a novel structure with a high degree of integration. A semiconductor device includes a semiconductor layer having a channel formation region, a source electrode and a drain electrode electrically connected to the channel formation region, a gate electrode overlapping with the channel formation region, and a gate insulating layer between the channel formation region and the gate electrode. A portion of a side surface of the semiconductor layer having the channel formation region and a portion of a side surface of the source electrode or the drain electrode are substantially aligned with each other when seen from a planar direction.
Claims26
A semiconductor device comprising:
- a semiconductor layer comprising a channel formation region;
- a source electrode and a drain electrode electrically connected to the channel formation region;
- a gate electrode overlapping with the channel formation region;
- and
- a gate insulating layer between the channel formation region and the gate electrode,
- wherein a portion of a side surface of the semiconductor layer comprising the channel formation region and a portion of a side surface of the source electrode or the drain electrode are substantially aligned with each other.
3 more elements
A semiconductor device comprising:
- a first transistor comprising:
- a first channel formation region;
- a first gate insulating layer over the first channel formation region;
- a first gate electrode over the first gate insulating layer, the first gate electrode overlapping with the first channel formation region;
- and
- a source region and a drain region between which the first channel formation region is sandwiched;
- and
- a second transistor comprising:
- a semiconductor layer comprising a second channel formation region;
- a source electrode and a drain electrode electrically connected to the second channel formation region;
- a second gate electrode overlapping with the second channel formation region;
- and
- a second gate insulating layer between the second channel formation region and the second gate electrode,
- wherein the first channel formation region and the second channel formation region comprise different semiconductor materials as respective main components,
- wherein a portion of a side surface of the first channel formation region, a portion of a side surface of the first gate insulating layer, and a portion of a side surface of the first gate electrode are substantially aligned with each other, and
- wherein a portion of a side surface of the semiconductor layer comprising the second channel formation region and a portion of a side surface of the source electrode or the drain electrode are substantially aligned with each other.
13 more elements
A semiconductor device comprising:
- a semiconductor layer comprising a channel formation region;
- a source electrode and a drain electrode electrically connected to the channel formation region;
- a gate electrode overlapping with the channel formation region;
- and
- a gate insulating layer between the channel formation region and the gate electrode,
- wherein a portion of the channel formation region overlap with a portion of the source electrode or the drain electrode, and
- wherein a width of the portion of the channel formation region is substantially equal to a width of the portion of the source electrode or the drain electrode.
4 more elements
A semiconductor device comprising:
- a first transistor comprising:
- a first channel formation region;
- a first gate insulating layer over the first channel formation region;
- a first gate electrode over the first gate insulating layer, the first gate electrode overlapping with the first channel formation region;
- and
- a source region and a drain region between which the first channel formation region is sandwiched;
- and
- a second transistor comprising:
- a semiconductor layer comprising a second channel formation region;
- a source electrode and a drain electrode electrically connected to the second channel formation region;
- a second gate electrode overlapping with the second channel formation region;
- and
- a second gate insulating layer between the second channel formation region and the second gate electrode,
- wherein the first channel formation region and the second channel formation region comprise different semiconductor materials as respective main components,
- wherein a portion of a side surface of the first channel formation region, a portion of a side surface of the first gate insulating layer, and a portion of a side surface of the first gate electrode are substantially aligned with each other,
- wherein a portion of the second channel formation region overlap with a portion of the source electrode or the drain electrode, and
- wherein a width of the portion of the second channel formation region is substantially equal to a width of the portion of the source electrode or the drain electrode.
14 more elements
Dependencies are inferred from the claim text.