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US 2011/0298046 A1Published application
Semiconductor device with buried bit lines and method for fabricating the same
AssigneeHynix Semiconductor Inc.
InventorKi-Ro Hong
Life of this patent
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Abstract
A semiconductor device includes active regions separated by a trench, a separation layer dividing the trench, and buried bit lines buried in the trench with the separation layer interposed between the buried bit lines.
Claims32
A semiconductor device comprising:
- active regions separated by a trench;
- a separation layer dividing the trench;
- and
- buried bit lines buried in the trench with the separation layer interposed between the buried bit lines.
1 more element
A semiconductor device comprising:
- a plurality of active regions separated by alternating ones of first trenches and second trenches, wherein the second trenches have a width smaller than that of the first trenches;
- separation layers for dividing the first trenches, respectively;
- buried bit lines buried in each of the first trenches with the separation layers interposed between the bit lines of the trench;
- and
- junctions formed in the active regions and connected with the buried bit lines.
2 more elements
A method for fabricating a semiconductor device, comprising:
- etching a substrate and defining a trench which separates active regions;
- forming a liner layer which has contact zones for exposing portions of sidewalls of the active regions;
- and
- forming junctions on the exposed portions of the sidewalls of the active regions.
1 more element
A method for fabricating a semiconductor device, comprising:
- etching a substrate and defining a trench which separates active regions;
- forming a separation layer which divides the trench into portions;
- and
- forming buried bit lines which are each buried in the respective divided portion of the trench.
1 more element
A method for fabricating a semiconductor device, comprising:
- etching a substrate and forming active regions which are separated by alternating ones of first trenches and second trenches, wherein the second trenches have a width smaller than that of the first trenches;
- forming a junction on a sidewall of each of the active regions;
- forming separation layers dividing the first trenches, respectively;
- and
- forming buried bit lines which are buried in each of the first trenches with the respective separation layer interposed between the buried bit lines and are connected with the respective junctions.
2 more elements
Dependencies are inferred from the claim text.