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US 2011/0254614 A1Published application
System and Method of Transistor Switch Biasing in a High Power Semiconductor Switch
AssigneeSiGe Semiconductor Inc.
InventorsChun-Wen Paul Huang, Mark Doherty, Philip Michael Antognetti
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Abstract
A system and method are provided for biasing transistor switches in a semiconductor based high power switch. Off-state Vgsd biasing for the off transistor switches is based upon acceptable levels of spurious harmonic emissions and linearity.
Claims29
A method of biasing transistor switches in a high power switch, the method comprising:
- providing on-state Vgsd (gate to source/drain bias voltage) at an on-state Vgsd level to a first transistor switch of said transistor switches for biasing the first transistor switch in an on state;
- and
- providing off-state Vgsd at an off-state Vgsd level to a second transistor switch of said transistor switches for biasing the second transistor switch in an off state, wherein a magnitude of the off-state Vgsd level is less than a magnitude of the on-state Vgsd level by only an amount sufficient for at least one of:
- bringing spurious harmonic emissions of said second transistor switch when biased to the off state below a pre-identified upper limit of acceptable spurious harmonic emissions from the second transistor switch in the off state;
- and
- bringing a linearity of the high power switch above a pre-identified lower limit of acceptable linearity for the high power switch.
3 more elements
A method of biasing transistor switches in a high power switch, the method comprising:
- biasing at a gate of a first transistor switch of the transistor switches with a first biasing controller at a fixed primary biasing fraction of a first control voltage input to the first biasing controller;
- biasing at a source-drain of the first transistor switch with a second biasing controller at a fixed secondary biasing fraction of a second control voltage input to the second biasing controller;
- biasing at a gate of a second transistor switch of the transistor switches with the second biasing controller at the fixed primary biasing fraction of the second control voltage input;
- and
- biasing at a source-drain of the second transistor switch with the first biasing controller at the fixed secondary biasing fraction of the first control voltage;
- wherein when the high power switch is in a first switch state in which the first transistor switch is on and the second transistor switch is off:
- providing a high system control voltage as the first control voltage to the first basing controller;
- and
- providing a low system control voltage as the second control voltage to the second biasing controller,
- wherein when the high power switch is in a second switch state in which the first transistor switch is off and the second transistor switch is on:
- providing a low system control voltage as the first control voltage to the first basing controller;
- and
- providing a high system control voltage as the second control voltage to the second biasing controller,
- wherein:
- a magnitude of the difference between the product of the primary biasing fraction and the low system control voltage and the product of the secondary biasing fraction and the high system control voltage
- is less than
- a magnitude of the difference between the product of the primary biasing fraction and the high system control voltage and the product of the secondary biasing fraction and the low system control voltage
- by only an amount sufficient for at least one of:
- bringing spurious harmonic emissions of said second transistor switch when biased to the off state below a pre-identified upper limit of acceptable spurious harmonic emissions from the second transistor switch in the off state;
- and
- bringing a linearity of the high power switch above a pre-identified lower limit of acceptable linearity for the high power switch.
18 more elements
A high power switch comprising:
- a plurality of transistor switches comprising:
- a first transistor switch;
- and
- a second transistor switch,
- biasing circuitry for providing, when the high power switch is in a first high power switch state:
- on-state Vgsd at a on-state Vgsd level to the first transistor switch for biasing the first transistor switch in an on state;
- and
- off-state Vgsd at a off-state Vgsd level to the second transistor switch for biasing the second transistor switch in an off state,
- wherein a magnitude of the off-state Vgsd level is less than a magnitude of the on-state Vgsd level by only an amount sufficient for at least one of:
- bringing spurious harmonic emissions of said second transistor switch when biased to the off state below a pre-identified upper limit of acceptable spurious harmonic emissions from the second transistor switch in the off state;
- and
- bringing a linearity of the high power switch above a pre-identified lower limit of acceptable linearity for the high power switch.
9 more elements
A high power switch comprising:
- a first transistor switch;
- a second transistor switch;
- a first biasing controller for receiving a first control voltage and for:
- biasing at a gate of the first transistor switch at a fixed primary biasing fraction of the first control voltage;
- and
- biasing at a source-drain of the second transistor switch at a fixed secondary biasing fraction of the first control voltage,
- a second biasing controller for receiving a second control voltage and for:
- biasing at a source-drain of the first transistor switch at the fixed secondary biasing fraction of the second control voltage;
- and
- biasing at a gate of the second transistor switch at the fixed primary biasing fraction of the second control voltage input,
- wherein the first control voltage and the second control voltage are each a different one of a high system control voltage and a low system control voltage, and wherein:
- a magnitude of the difference between the product of the primary biasing fraction and the low system control voltage and the product of the secondary biasing fraction and the high system control voltage
- is less than
- a magnitude of the difference between the product of the primary biasing fraction and the high system control voltage and the product of the secondary biasing fraction and the low system control voltage
- by only an amount sufficient for at least one of:
- bringing spurious harmonic emissions of said second transistor switch when biased to the off state below a pre-identified upper limit of acceptable spurious harmonic emissions from the second transistor switch in the off state;
- and
- bringing a linearity of the high power switch above a pre-identified lower limit of acceptable linearity for the high power switch.
15 more elements
Dependencies are inferred from the claim text.