Semiconductor device
AssigneeRenesas Electronics Corporation
InventorYoshihisa Matsubara
Life of this patent
Estimating the term…
Abstract
A semiconductor device having a via chain circuit including a plurality of fine interconnections and an extension interconnection wider than the fine interconnections, having a first end connected to one or more of the fine interconnections and a second end located in an area of the semiconductor device external to the via chain circuit. One or more of the fine interconnections becomes wider gradually towards the connection to the extension interconnection. The extension interconnection is formed in a same layer as the one or more of the fine interconnections connected to the extension interconnection. The one or more of the fine interconnections connected to the extension interconnection is connected to the extension interconnections at a position where the fine interconnections become wider.
Claims22
A semiconductor device, comprising:
- a via chain circuit comprising a plurality of fine interconnections;
- and
- an extension interconnection wider than said fine interconnections, comprising a first end connected to one or more of said fine interconnections and a second end located in an area of the semiconductor device external to the via chain circuit,
- wherein one or more of said fine interconnections becomes wider gradually towards the connection to the extension interconnection,
- wherein said extension interconnection is formed in a same layer as said one or more of said fine interconnections connected to the extension interconnection, and
- wherein said one or more of said fine interconnections connected to the extension interconnection is connected to the extension interconnections at a position where said fine interconnections become wider.
A semiconductor device, comprising:
- a via chain circuit region comprising a plurality of fine interconnections;
- an extension wiring pattern connected to one or more fine interconnections in the via chain circuit region, said extension wiring pattern comprising an interconnection that is wider than the fine interconnections in the via chain circuit;
- a ground interconnection array in the via chain circuit region;
- and
- a power source interconnection array in the via chain circuit region,
- wherein one or more of said fine interconnections comprise an enlarged tapered portion at the end of the extension wiring pattern connected to the fine interconnections, and
- wherein said one or more of said fine interconnections connected to the extension wiring pattern is connected to the extension wiring pattern at a position where said one or more of said fine interconnections becomes wider.
A semiconductor device containing via chain circuits, comprising:
- a via chain circuit comprising an interconnection wiring pattern;
- a first end of an interconnect extension connected to one or more interconnection points in the interconnection wiring pattern of the via chain circuit comprising a tapered cross section, whereby the tapered cross section increases from a first width at a fine interconnection of the interconnection wiring pattern to a second width wider than said first width, said interconnect extension being wider than said fine interconnection;
- and
- a second end of said interconnect extension located in an area of the semiconductor device external to the via chain circuit, and
- wherein said interconnect wiring pattern is connected to the interconnect extension interconnection at a position where said fine interconnection becomes wider.
A semiconductor device, comprising:
- a via chain circuit comprising a plurality of fine interconnections;
- a connection portion having a first end connected to one of said fine interconnections and a second end;
- and
- an extension interconnection wider than said fine interconnections, having a first end connected to said second end of said connection portion and a second end located in an area of the semiconductor device external to said via chain circuit,
- wherein said connection portion becomes wider gradually toward said second end of said connecting interconnection,
- wherein said extension interconnection is formed in a same layer as said connection portion and said fine interconnections, and
- wherein said connection portion is connected to said extension interconnection at a point where a width of said connection portion is widened.
Dependencies are inferred from the claim text.