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US 2011/0254170 A1Published application
Semiconductor device
AssigneeKabushiki Kaisha Toshiba
InventorKenichi Ishii
Life of this patent
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Abstract
According to one embodiment, a semiconductor device includes a base layer on which a revision signal transmission circuit is formed, three or more interconnect layers laminated on the base layer, a power source interconnect or a ground interconnect on an uppermost interconnect layer, and a revision signal line which connects the revision control circuit only to the power source interconnect or the ground interconnect of the uppermost interconnect layer.
Claims7
A semiconductor device comprising:
- a base layer on which a revision signal transmission circuit is formed;
- three or more interconnect layers laminated on the base layer;
- a power source interconnect or a ground interconnect on an uppermost interconnect layer;
- and
- a revision signal line which connects the revision control circuit only to the power source interconnect or the ground interconnect of the uppermost interconnect layer.
2 more elements
Dependencies are inferred from the claim text.