Semiconductor integrated circuit

A semiconductor integrated circuit which is equipped with a plurality of analog macros each having a comb capacitor, wherein:

• said comb capacitor has a comb-shaped first electrode and a comb-shaped second electrode, said first electrode and said second electrode being engaged with each other so that comb tooth portions of the first electrode and comb tooth portions of the second electrode are arranged alternately and parallel to one another;
• a comb tooth interval and a comb tooth width of said comb capacitor are varied according to an absolute accuracy indicating an error between an actual capacitance value and an ideal capacitance value of the comb capacitor;
• and
• the absolute accuracy required of said comb capacitor varies depending on the type of the analog macro having the comb capacitor.

A semiconductor integrated circuit which is equipped with a plurality of analog macros each having a plurality of comb capacitors, wherein:

• each of said comb capacitors has a comb-shaped first electrode and a comb-shaped second electrode, said first electrode and said second electrode being engaged with each other so that comb tooth portions of the first electrode and comb tooth portions of the second electrode are arranged alternately and parallel to one another;
• a comb tooth interval of said comb capacitor is varied according to a relative accuracy indicating an error between a capacitance value of said comb capacitor and a capacitance value of a comb capacitor adjacent thereto;
• and
• the relative accuracy required of said comb capacitor varies depending on the type of the analog macro having the comb capacitor.

A semiconductor integrated circuit which is equipped with a plurality of analog macros each having a plurality of comb capacitors, wherein:

• each of said comb capacitors has a comb-shaped first electrode and a comb-shaped second electrode, said first electrode and said second electrode being engaged with each other so that comb tooth portions of the first electrode and comb tooth portions of the second electrode are arranged alternately and parallel to one another;
• a comb tooth interval and a comb tooth width of said comb capacitor are varied according to a relative accuracy indicating an error between a capacitance value of said comb capacitor and a capacitance value of a comb capacitor adjacent thereto;
• and
• the relative accuracy required of said comb capacitor varies depending on the type of the analog macro having the comb capacitor.

A semiconductor integrated circuit which is equipped with a plurality of analog macros, wherein:

• each of said analog macros is provided with a plurality of analog circuits each having a plurality of comb capacitors;
• each of said comb capacitor has a comb-shaped first electrode and a comb-shaped second electrode, said first electrode and said second electrode being engaged with each other so that comb tooth portions of the first electrode and comb tooth portions of the second electrode are arranged alternately and parallel to one another;
• a comb tooth interval of said comb capacitor is varied according to a relative accuracy indicating an error between a capacitance value of said comb capacitor and a capacitance value of a comb capacitor adjacent thereto;
• and
• the relative accuracy required of said comb capacitor varies depending on the type of the analog circuit having the comb capacitor.

A semiconductor integrated circuit which is equipped with a plurality of analog macros, wherein:

• each of said analog macros is provided with a plurality of analog circuits each having a plurality of comb capacitors;
• each of said comb capacitor has a comb-shaped first electrode and a comb-shaped second electrode, said first electrode and said second electrode being engaged with each other so that comb tooth portions of the first electrode and comb tooth portions of the second electrode are arranged alternately and parallel to one another;
• a comb tooth interval and a comb tooth width of said comb capacitor are varied according to a relative accuracy indicating an error between a capacitance value of said comb capacitor and a capacitance value of a comb capacitor adjacent thereto;
• and
• the relative accuracy required of said comb capacitor varies depending on the type of the analog circuit having the comb capacitor.

A semiconductor integrated circuit which is equipped with a plurality of first analog macros and a plurality of second analog macros, wherein:

• each of said first analog macros is provided with a plurality of comb capacitors,
• each of the comb capacitors in said first analog macro has a comb-shaped first electrode and a comb-shaped second electrode, said first electrode and said second electrode being engaged with each other so that comb tooth portions of the first electrode and comb tooth portions of the second electrode are arranged alternately and parallel to one another,
• a comb tooth interval of the comb capacitor in said first analog macro is varied according to an absolute accuracy indicating an error between an actual capacitance value and an ideal capacitance value of the comb capacitor,
• the absolute accuracy required of the comb capacitor in the first analog macro varies depending on the type of the first analog macro having the comb capacitor;
• and
• each of said second analog macros is provided with a plurality of comb capacitors,
• each of the comb capacitors in said second analog macro has a comb-shaped first electrode and a comb-shaped second electrode, said first electrode and said second electrode being engaged with each other so that comb tooth portions of the first electrode and comb tooth portions of the second electrode are arranged alternately and parallel to one another,
• a comb tooth interval of the comb capacitor in said second analog macro is varied according to a relative accuracy indicating an error between a capacitance value of said comb capacitor and a capacitance value of a comb capacitor adjacent thereto, and
• the relative accuracy required of the comb capacitor in the second analog macro varies depending on the type of the second analog macro having the comb capacitor.

A semiconductor integrated circuit which is equipped with a plurality of first analog macros and a plurality of second analog macros, wherein:

• each of said first analog macros is provided with a plurality of comb capacitors,
• each of the comb capacitors in said first analog macro has a comb-shaped first electrode and a comb-shaped second electrode, said first electrode and said second electrode being engaged with each other so that comb tooth portions of the first electrode and comb tooth portions of the second electrode are arranged alternately and parallel to one another,
• a comb tooth interval and a comb tooth width of the comb capacitor in said first analog macro are varied according to an absolute accuracy indicating an error between an actual capacitance value and an ideal capacitance value of the comb capacitor,
• the absolute accuracy required of the comb capacitor in the first analog macro varies depending on the type of the first analog macro having the comb capacitor;
• and
• each of said second analog macros is provided with a plurality of comb capacitors,
• each of the comb capacitors in said second analog macro has a comb-shaped first electrode and a comb-shaped second electrode, said first electrode and said second electrode being engaged with each other so that comb tooth portions of the first electrode and comb tooth portions of the second electrode are arranged alternately and parallel to one another,
• a comb tooth interval and a comb tooth width of the comb capacitor in said second analog macro are varied according to a relative accuracy indicating an error between a capacitance value of said comb capacitor and a capacitance value of a comb capacitor adjacent thereto, and
• the relative accuracy required of the comb capacitor in the second analog macro varies depending on the type of the second analog macro having the comb capacitor.