Semiconductor memory device and manufacturing method thereof

A manufacturing method of a semiconductor memory device comprising:

• forming a plurality of switching transistors on a semiconductor substrate;
• embedding a conductive plug material between adjacent two of the switching transistors;
• forming a contact plug electrically connected to diffusion layers of the switching transistors by polishing the plug material until when an upper surface of the switching transistors is exposed;
• depositing a material of an upper connector on upper surfaces of the contact plug and the switching transistors;
• depositing a material of a memory element storing data, on a material of the upper connector;
• depositing a mask material on a material of the memory element;
• processing the mask material in a pattern of the memory element;
• and
• etching a material of the memory element and a material of the upper connector by using the mask material as a mask, until when an upper surface of the switching transistors is exposed.

A manufacturing method of a semiconductor memory device comprising:

• forming a plurality of switching transistors on a semiconductor substrate;
• embedding a conductive plug material between adjacent two of the switching transistors;
• forming a contact plug electrically connected to diffusion layers of the switching transistors by polishing the plug material until when an upper surface of the switching transistors is exposed;
• depositing a material of an upper connector on upper surfaces of the contact plug and the switching transistors;
• depositing a first mask material on a material of the upper connector;
• processing the first mask material so as to leave the material above the contact plug;
• forming an upper connector electrically connected to the contact plug by etching a material of the upper connector by using the first mask material as a mask;
• depositing an interlayer dielectric film so as to cover the upper connector after removing the first mask material;
• polishing the interlayer dielectric film until when an upper surface of the upper connector is exposed;
• depositing a material of a memory element storing data, on the upper connector;
• depositing a second mask material on the material of the memory element;
• processing the second mask material so as to have a plane area larger than a plane area of an upper surface of the upper connector;
• and
• forming the memory element having a bottom surface larger than an upper surface of the upper connector by etching a material of the memory element by using the second mask material as a mask.

A manufacturing method of a semiconductor memory device comprising:

• forming a plurality of switching transistors on a semiconductor substrate;
• embedding a conductive plug material between adjacent two of the switching transistors;
• forming a contact plug electrically connected to diffusion layers of the switching transistors by polishing the plug material until when an upper surface of the switching transistors is exposed;
• depositing a material of an upper connector on upper surfaces of the contact plug and the switching transistors;
• depositing a material of a memory element storing data, on the material of the upper connector;
• depositing a mask material on the material of the memory element;
• processing the mask material in a pattern of the memory element;
• forming the memory element by etching a material of the memory element by using the mask material as a mask, until when a material of the upper connector is exposed;
• forming a sidewall layer on a side surface of the memory element;
• and
• etching a material of the upper connector by using the memory element and the sidewall layer as a mask, until when an upper surface of the switching transistors is exposed.