Circuit Structure of Package Carrier and Multi-Chip Package

A circuit structure of a package carrier that carries a plurality of wire bonding light emitting diode (LED) chips, the circuit structure comprising:

• a plurality of chip pads arranged in an array of M columns and N rows to dispose the LED chips, M and N each being a positive integer greater than 1;
• for each of the chip pads:
• a respective first bonding pad, a respective second bonding pad, and a respective third bonding pad that are electrically insulated from each other and sequentially arranged in a peripheral area of the respective chip pad, a first orientation of the respective first, second, and third bonding pads in a first row of the N rows differing from a second orientation of the respective first, second, and third bonding pads in a second row of the N rows by 90 degrees;
• and
• a first electrode, a second electrode, and a third electrode:
• the first electrode comprising a plurality of first branch lines connected to the respective M first bonding pads in each of the N rows;
• the second electrode comprising a plurality of second branch lines connected to the respective M second bonding pads in each of the N rows;
• and
• a third electrode comprising a plurality of third branch lines connected to the respective M third bonding pads in each of the N rows