Optical interconnect and signal transmission method

An optical interconnect, comprising:

• a transmitter circuit comprising a control circuit and an electrical/optical converter circuit, the control circuit being configured to receive an input electrical signal and output a drive signal, the electrical/optical converter circuit comprising a light emitting element and being configured to convert the drive signal to an optical signal;
• a receiver circuit comprising an optical/electrical converter circuit and a data recovery circuit, the data recovery circuit comprising a second trigger signal generator and a latch circuit, the optical/electrical converter circuit comprising a light receiving element and a received-signal amplifying circuit, the light receiving element is configured to convert the optical signal from the light emitting element of the transmitter circuit to an output current signal, the received-signal amplifying circuit being configured to convert the output current signal to a required digital voltage signal;
• and
• an optical signal transmission route optically connecting the transmitter circuit and the receiver circuit,
• wherein the control circuit of the transmitter circuit receives the input electrical signal whose one bit is indicated as one of a high level and a low level, the control circuit of the transmitter circuit is comprising a first trigger signal generator and a data converter circuit, the first trigger signal generator is configured to receive the input electrical signal and generate a first trigger signal that is a clock pulse having a pulse width ½p the pulse width of one bit of the input electrical signal and a ½p duty ratio where p is a natural number of 1 or greater, the data converter circuit is configured to receive the input electrical signal and the first trigger signal and output the drive signal, the data converter circuit is configured to output a high-level drive signal only when a high-level signal of the (q)th-bit input electrical signal where q is a natural number of 1 or greater and a high-level signal of the first trigger signal are input, to convert the high-level drive signal to a low-level drive signal, to output the low-level drive signal when the high-level signal of the first trigger signal is switched to a low-level signal, and to maintain the output of the low-level drive signal until a high-level signal of the input electrical signal and a high-level signal of the first trigger signal are input on or after the (q+1)th bit, the second trigger signal generator is configured to generate a second trigger signal which is a clock pulse having a pulse width ½r the pulse width of one bit of the input electrical signal where r is a natural number of 1 or greater when the digital voltage signal is input, and the latch circuit is configured to output a high-level output electrical signal only when a high-level signal of the (q)th-bit digital voltage signal and a high-level signal of the second trigger signal are input, and by maintaining the output of the high-level output electrical signal until a high-level signal of the (q+1)th-bit second trigger signal is input, convert the digital voltage signal to an output electrical signal having a same format as a format of the input electrical signal.