Memory device and method
AssigneeSpansion LLC
InventorsBruce Lee Morton, Michael VanBuskirk
Life of this patent
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Abstract
During first portion of a first read cycle determining that a first input of a sense amplifier is to receive information based upon a state of a storage cell during a first portion of a read cycle, and determining that a conductance at the first input is substantially equal to a conductance at a second input of the sense amplifier during the first portion. A plurality of NAND string modules are connected to a global bit line of a memory device that includes a memory column where a plurality of NAND strings and a buffer are formed.
Claims14
A method comprising:
- determining that during a first portion of a first read cycle that a first input of a sense amplifier is to receive a data signal and a second input of the sense amplifier is to receive a reference signal;
- and
- determining that a conductance at the first input is substantially equal to a conductance at the second input during the first portion of the first read cycle;
- and
- generating a first logic state at an output of the sense amplifier in response to determining the conductance at the first input is substantially equal to the conductance at the second input.
A method of determining a logic value at a sense amplifier comprising:
- during a first time period of first read cycle:
- charging a first capacitor to a first voltage based upon a threshold voltage of a first transistor, and
- charging a second capacitor to a second voltage based upon a threshold voltage of a second transistor,
- during a second time period of the first read cycle:
- modifying the first voltage at the first capacitor by a voltage offset, and maintaining the second voltage at the second capacitor;
- during a third time period of the first read cycle:
- amplifying a signal difference between a signal at a first current electrode of the first transistor and a signal at a first current electrode of the second transistor, wherein the effective threshold voltage of the first transistor is greater than the effective threshold voltage of the second transistor by the offset voltage;
- and
- during a fourth time period of the first read cycle:
- determining a logic value based upon the amplified signal.
Dependencies are inferred from the claim text.