Solid-state imaging device

A solid-state imaging device comprising:

• a plurality of vertical signal lines, each of which is arranged for each column in a pixel array and transmits a pixel signal from a pixel;
• a column selection circuit that outputs a column selection signal which sequentially selects each column in the pixel array at a predetermined time interval;
• a sample hold signal conversion circuit that includes a plurality of analog-digital converters to which the image signals are inputted from the plurality of vertical signal lines in a one-to-one relationship with the analog-digital converters, and a plurality data transfer circuits that transfer n bits (n≧1) in a column direction for each column selection signal among digital data of a predetermined number of bits converted by each of the plurality of analog-digital converters by using one data line;
• a plurality of reference voltage drive circuits that are provided in one-to-one relationship with the data transfer circuits arranged in a row direction and each of which individually drives common 2n−1 reference voltage lines in accordance with the column selection signal;
• and
• a plurality of differential amplifier circuits that are provided in an input stage of a signal processing circuit that receives digital data from the sample hold signal conversion circuit and include 2n−1 differential amplifier circuits provided for each of the data transfer circuits which are arranged for each n bits of the digital data in a column direction, where the one data line is commonly and correspondingly connected to one differential input terminals of the 2n−1 differential amplifier circuits, and corresponding one of the 2n−1 reference voltage lines is individually connected to the other differential input terminals.

A solid-state imaging device comprising:

• a plurality of vertical signal lines, each of which is arranged for each column in a pixel array and transmits a pixel signal from a pixel;
• a column selection circuit that outputs a column selection signal which collectively and sequentially selects N columns (N≧2) in the pixel array at a predetermined time interval;
• a sample hold signal conversion circuit that includes a plurality of analog-digital converters to which the image signals are inputted from the plurality of vertical signal lines in a one-to-one relationship with the analog-digital converters, and a plurality data transfer circuits that transfer n bits for each n columns (n≧2) in the pixel array among digital data of a predetermined number of bits converted by each of the plurality of analog-digital converters by using one data line according to the column selection signal;
• a plurality of reference voltage drive circuits that are provided in one-to-one relationship with the data transfer circuits arranged in a row direction and each of which individually drives common 2n−2 reference voltage lines in accordance with the column selection signal;
• and
• a plurality of differential amplifier circuits that are provided in an input stage of a signal processing circuit that receives digital data from the sample hold signal conversion circuit and include 2n−1 differential amplifier circuits provided for each of the data transfer circuits which are arranged in a column direction and the number of which is the same as the number of bits of the digital data, where the one data line is commonly and correspondingly connected to one differential input terminals of the 2n−1 differential amplifier circuits, and corresponding one of the 2n−2 reference voltage lines and one reference voltage line to which a fixed voltage is applied is individually connected to the other differential input terminals.