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US 2011/0219266 A1Published application
System and Method of Testing an Error Correction Module
AssigneeQUALCOMM Incorporated
InventorsHari M. Rao, Shahzad Nazar, Venugopal Boynapalli
Life of this patent
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Abstract
In an embodiment, a method of testing an error correction scheme includes selectively observing and controlling data at one or more intermediate test points within an error correction circuit. Erroneous data may be selectively injected at a first intermediate test point and data related to the erroneous data may be observed at a second intermediate test point.
Claims24
A method of testing an error correction circuit device, the method comprising:
- selectively observing data at one or more intermediate test points within an error correction circuit.
A method of testing an error correction module, the method comprising:
- selectively injecting data at an intermediate test point of an error correction coding (ECC) module having multiple intermediate test points;
- and
- observing data related to the injected data at one or more of the multiple intermediate test points.
A system comprising:
- an error correction coding (ECC) module including an input to receive data and an output to provide error corrected data, the ECC module further comprising:
- a plurality of intermediate test ports;
- and
- ECC functionality testing logic coupled to the plurality of intermediate test ports.
1 more element
Dependencies are inferred from the claim text.