System for Retaining State Data
AssigneeBroadcom Corporation
InventorPaul Penzes
Life of this patent
Estimating the term…
Loading patent…
AssigneeBroadcom Corporation
InventorPaul Penzes
Estimating the term…
According to one embodiment, a system for retaining M bits of state data of an integrated circuit during power down includes M serially coupled scan flip flops divided into M/N groups, where the M scan flip flops are able to save/restore the M bits of state data. Each group contains a merged scan flip flop coupled to a series of scan flip flops. The merged scan flip flop in each of the groups is coupled to a respective read port of a memory unit, and a final scan flip flop in each of the groups is coupled to a respective write port of the memory unit. The system enables the memory unit to save the M bits of state data in N clock cycles. Each merged scan flip flop has a read select input that enables restoring of the state data into the M scan flip flops in N clock cycles.
1-20. (canceled)
A system for retaining M bits of state data of an integrated circuit during a power saving mode, said system comprising:
A merged scan flip flop for use in a system for retaining M bits of state data of an integrated circuit during a power saving mode, said merged scan flip flop comprising:
Dependencies are inferred from the claim text.