Strongly-Ordered Processor with Early Store Retirement

A processor comprising:

• a scheduler configured to schedule a first store memory operation to be executed, wherein the first store memory operation is assigned to a first entry in a queue in a load/store unit prior to being written to the scheduler, wherein the scheduler includes a buffer storing the first store memory operation and further storing a first identifier corresponding to the first entry;
• and
• the load/store unit coupled to receive the first identifier during execution of the first store memory operation, wherein the load/store unit comprises the queue and is configured to update the first entry responsive to the first identifier;
• wherein the scheduler is configured to retire the first store memory operation from the buffer responsive to the first store memory operation having been processed at least to a pipeline stage at which exceptions are reported and prior to the first store memory operation being completed, wherein retiring the first store memory operation comprises releasing resources used to track the first store memory operation as a speculative operation, including resources in the buffer;
• and
• wherein the first store memory operation remains represented in the queue within the load/store unit subsequent to the retiring.

A method comprising:

• a scheduler scheduling a first store memory operation to be executed, wherein the first store memory operation is assigned to a first entry in a queue in a load/store unit prior to being written to the scheduler, wherein the scheduler includes a buffer storing the first store memory operation and further storing a first identifier corresponding to the first entry;
• a load/store unit receiving the first identifier during execution of the first store memory operation, wherein the load/store unit comprises the queue;
• the load/store unit updating the first entry responsive to the first identifier;
• the scheduler retiring the first store memory operation from the buffer responsive to the first store memory operation having been processed at least to a pipeline stage at which exceptions are reported and prior to the first store memory operation being completed, wherein retiring the first store memory operation comprises releasing resources used to track the first store memory operation as a speculative operation, including resources in the buffer;
• and
• retaining data corresponding to the first store memory operation in the queue within the load/store unit subsequent to the retiring.