Methods of forming dual gate of semiconductor device
AssigneeHynix Semiconductor Inc.
InventorsGyu Hyun Kim, Geun Min Choi, Baik Il Choi, Dong Joo Kim, Ji Hye Han
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Abstract
Disclosed herein is a method for forming a dual gate of a semiconductor device. The method comprises the steps of forming a first polysilicon layer doped with p-type impurity ions and a second polysilicon layer doped with n-type impurity ions on a first region and a second region of a semiconductor substrate, respectively, and sequentially subjecting the surfaces of the first and second polysilicon layers to wet cleaning, drying, and dry cleaning. The wet cleaning is performed by using a sulfuric acid peroxide mixture (SPM), a buffered oxide etchant (BOE), and Standard Clean-1 (SC-1) as cleaning solutions.
Claims15
-18. (canceled)
A method for forming a dual gate of a semiconductor device, the method comprising the steps of:
- forming a first polysilicon layer doped with p-type impurity ions and a second polysilicon layer doped with n-type impurity ions on a first region and a second region of a semiconductor substrate, respectively;
- and
- wet cleaning the first and second polysilicon layers by using a sulfuric acid peroxide mixture (SPM), a buffered oxide etchant (BOE), and Standard Clean-1 (SC-1) as cleaning solutions;
- drying the first and second polysilicon layers;
- and
- dry cleaning the first and second polysilicon layers.
-28. (canceled)
Dependencies are inferred from the claim text.