Back to results
US 2011/0212547 A1Published application
Methods for monitoring the amount of metal contamination imparted into wafers during a semiconductor process
AssigneeMEMC Electronic Materials, Inc.
InventorsJeffrey L. Libbert, Lu Fei
Life of this patent
Estimating the term…
Abstract
Methods are disclosed for monitoring the amount of metal contamination imparted during wafer processing operations such as polishing and cleaning. The methods include subjecting a silicon-on-insulator structure to the semiconductor process, precipitating metal contamination in the structure and delineating the metal contaminants.
Claims5
A method for monitoring the amount of metal contamination imparted into wafers during a semiconductor process, the method comprising:
- exposing at least one silicon-on-insulator structure to the semiconductor process, the silicon-on-insulator structure comprising a handle wafer, a silicon layer, and a dielectric layer between the handle wafer and the silicon layer;
- evaluating metal contamination indicators of the silicon-on-insulator structures;
- and
- verifying whether the amount of metal contamination imparted into semiconductor wafers is acceptable.
1 more element
Dependencies are inferred from the claim text.