Non-volatile Semiconductor Device, Programmable Memory, Capacitor and Metal Oxide Semiconductor

A programmable memory device comprising:

• a gate dielectric layer formed on a semiconductor substrate;
• a polysilicon gate electrode formed on the gate dielectric layer for receiving a voltage, so that a dielectric breakdown of the gate dielectric layer results from the voltage for accessing data;
• a first source/drain and a second source/drain formed in the semiconductor substrate and being separate from each other;
• and
• a coupling gate consisting essentially of a capacitor dielectric layer and a contact plug, wherein the capacitor dielectric layer is disposed on a portion of the semiconductor substrate, the portion of the semiconductor substrate is positioned between the first source/drain and the second source/drain, and the contact plug is formed on the capacitor dielectric layer.

A capacitor compatible with semiconductor fabrication, the capacitor comprising:

• a bottom electrode being a heavily doped polysilicon layer or a heavily doped region of a semiconductor substrate;
• a capacitor dielectric layer formed on the bottom electrode;
• and
• a top electrode formed on the capacitor dielectric layer,
• wherein the capacitor dielectric layer is a self-aligned silicide blocking layer or a resist protective layer.

A metal oxide semiconductor compatible with semiconductor fabrication, the metal oxide semiconductor comprising:

• a capacitor dielectric layer formed on a semiconductor substrate;
• a contact plug formed on the capacitor dielectric layer;
• and
• a first source/drain and a second source/drain formed in the semiconductor substrate and disposed at opposing sides of the contact plug.