Semiconductor device including analog circuit and digital circuit

A method of controlling a semiconductor device including an analog circuit with a first delay variation in response to a variation in a power supply potential, and a digital circuit with a second delay variation smaller than said first delay variation in response to the variation in the power supply potential, said digital circuit including a first circuit and a second circuit, and said digital circuit outputting a control signal to control said analog circuit, said method comprising:

• propagating a first signal through said first circuit which is supplied with a first power supply potential and provided with said second delay variation;
• detecting a first delay caused when said first signal is propagated through said first circuit;
• and
• controlling a second delay of said second circuit to change from said second delay variation to said first delay variation in correlation to the detected first delay,
• wherein said second circuit is supplied with a second power supply potential whose potential variation is smaller than said first power supply potential, and said second circuit generates said control signal to control said analog circuit.

A system comprising:

• a system bus;
• a processor connected to said system bus;
• and
• a semiconductor device connected to said system bus, said semiconductor device comprising:
• an analog circuit with a first delay variation in response to a variation in a power supply potential, said analog circuit being connected to a first power supply potential;
• and
• a digital circuit with a second delay variation smaller than said first delay variation in response to the variation in the power supply potential, said digital circuit generating a control signal to control said analog circuit,
• wherein said digital circuit comprising:
• a first circuit connected to said first power supply potential and provided with a first delay caused when the first circuit is supplied with a first signal and propagates said first signal in relation to said second delay variation;
• a detecting circuit outputting a detected value corresponding to said first delay;
• and
• a second circuit connected to a second power supply potential whose potential variation is smaller than said first power supply potential,
• wherein said second circuit is supplied with a second signal and generates said control signal which has a second delay in relation to said second delay variation;
• wherein said second delay is controlled to change from said second delay variation to said first delay variation in correlation to the first delay which is indicated by said detected value.