Loading patent…
AssigneesSTMicroelectronics, SA, University of Cergy-Pontoise, University of Arizona
InventorsShiva K. PLANJERY, Shashi Kiran CHILAPPAGARI, Bane VASIC, David DECLERCQ
Estimating the term…
In this invention, a new class of finite precision multilevel decoders for low-density parity-check (LDPC) codes is presented. These decoders are much lower in complexity compared to the standard belief propagation (BP) decoder. Messages utilized by these decoders are quantized to certain levels based on the number of bits allowed for representation in hardware. A message update function specifically defined as part of the invention, is used to determine the outgoing message at the variable node, and the simple min operation along with modulo 2 sum of signs is used at the check node. A general methodology is provided to obtain the multilevel decoders, which is based on reducing failures due to trapping sets and improving the guaranteed error-correction capability of a code. Hence these decoders improve the iterative decoding process on finite length graphs and have the potential to outperform the standard floating-point BP decoder in the error floor region. The description and apparatus of 3-bit decoders for column-weight three LDPC codes is also presented.
A message passing decoder, propagating messages from a non-binary finite alphabet, for use with any LDPC codes, comprising a variable node processor defined by a message update function at a variable node.
A message passing decoder, propagating messages from a non-binary finite alphabet, for use with any LDPC codes, comprising variable node processors defined by a plurality of message update functions at the variable nodes, to improve the error-correction capability of the code.
A finite alphabet message passing decoding method comprising:
Dependencies are inferred from the claim text.