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US 2011/0086482 A1Published application
Apparatus and associated method for making a floating gate cell with increased overlay between the control gate and floating gate
AssigneeMacronix International Co., Ltd.
InventorsChen-Chin Liu, Lan Ting Huang, Ling Kuey Yang, Po Hsuan Wu
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Abstract
A method for fabricating a floating gate memory device comprises using a buried diffusion oxide that is below the floating gate thereby producing an increased step height between the floating gate and the buried diffusion oxide. The increased step height can produce a higher GCR, while still allowing decreased cell size using a virtual ground array design.
Claims10
A method for making a floating gate memory device, comprising:
- forming a first dielectric layer on a substrate;
- forming a first polysilicon layer over the dielectric layer;
- forming a cap layer over the first polysilicon layer;
- patterning and etching the cap layer, the first polysilicon layer, the first dielectric layer, and the substrate to form a floating gate and a shallow recess in the substrate;
- forming a buried diffusion region in the substrate in the area of the shallow recess;
- and
- forming a buried diffusion oxide in the buried diffusion region such that the top of the buried diffusion oxide is below the top of the first polysilicon layer.
4 more elements
Dependencies are inferred from the claim text.