Active device array substrate, display panel and manufacturing method of display panel

An active device array substrate, having a first region, a second region and a third region, and the active device array substrate comprising:

• an active device array;
• a pad, disposed in the second region;
• a driving circuit, disposed in the third region;
• and
• a first alignment layer, covering the first region, the second region and the third region, wherein a thickness of the first alignment layer in the first region is substantially greater than a thickness of the first alignment layer in the second region, the ratio of the thickness of the first alignment layer in the second region to the thickness of the first alignment layer in the first region is substantially greater than zero and substantially less than or equal to 0.43, and a thickness of the first alignment layer in the third region is substantially greater than the thickness of the first alignment layer in the first region or the second region.

A manufacturing method of a display panel, comprising:

• providing an active device array substrate having a first region, a second region and a third region, the active device array substrate comprising:
• an active device array;
• a pad, disposed in the second region;
• a driving circuit, disposed in the third region;
• a first alignment layer, covering the first region, the second region and the third region, wherein a thickness of the first alignment layer in the first region is substantially greater than a thickness of the first alignment layer in the second region, the ratio of the thickness of the first alignment layer in the second region to the thickness of the first alignment layer in the first region is substantially greater than zero and less than or equal to 0.43, and a thickness of the first alignment layer in the third region is substantially greater than the thickness of the first alignment layer in the first region or the second region;
• providing an opposite substrate disposed opposite to the active device array substrate, and the opposite substrate comprising:
• an electrode layer;
• a second alignment layer, covering the electrode layer, wherein a thickness of the second alignment layer in the first region is substantially greater than a thickness of the second alignment layer in the second region, and the ratio of the thickness of the second alignment layer in the second region to the thickness of the second alignment layer in the first region is substantially greater than zero and substantially less than or equal to 0.43;
• providing a display medium between the active device array substrate and the opposite substrate;
• providing a plurality of spacers between the active device array substrate and the opposite substrate for maintaining a cell gap;
• and
• disposing a conductive member between the active device array substrate and the opposite substrate, wherein the conductive member is located in the second region and corresponding to the pad, and bonding the active device array substrate and the opposite substrate, wherein the conductive member penetrates the first alignment layer and the second alignment layer to connect the electrode layer and the pad.