Shift register and display device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsHiroyuki Miyake, Seiko Amano
Life of this patent
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AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsHiroyuki Miyake, Seiko Amano
Estimating the term…
The shift register includes first to fourth flip-flops. A first clock signal which is in a first voltage state in a first period and in a second voltage state in second to fourth periods is input to the first flip-flop. A second clock signal which is in the first voltage state in the second period and in the second voltage state in the third period and the fourth period is input to the second flip-flop. A third clock signal which is in the second voltage state in the first, second, and fourth periods and in the first voltage state in the third period is input to the third flip-flop. A fourth clock signal which is in the second voltage state in the first and second periods and in the first voltage state in the fourth period is input to the fourth flip-flop.
A shift register comprising:
A method for driving a shift register comprising a first to fourth flip-flops, comprising:
Dependencies are inferred from the claim text.