Electrical connection for multichip modules
AssigneeSamsung Electronics Co., Ltd.
InventorsSeok-Chan Lee, Min-Woo Kim
Life of this patent
Estimating the term…
Abstract
A semiconductor package includes a first semiconductor chip mounted on a substrate and a second semiconductor chip mounted on top of the first semiconductor chip. A plurality of metal lines is deposited on the top of the first chip, and the metal lines are isolated from circuitry in the first chip. Wire bonds connect pads on the second chip to metal lines on the first chip. Additional wired bonds connect the metal lines on the first chip to terminals on the substrate. Conductive through-silicon vias or solder bumps may replace the wire bonds, and additional chips may be included in the package.
Claims17
1-51. (canceled)
A multi-chip package comprising:
- a first semiconductor chip including first circuitry, a first chip terminal in communication with the first circuitry, a first surface, and conductor means for transmitting at least one of a signal and power;
- a second semiconductor chip attached above the first surface of the first semiconductor chip, the second semiconductor chip including second circuitry and a second chip terminal in communication with the second circuitry;
- and
- an electrical connection connecting the second chip terminal of the second semiconductor chip to the conductor means of the first semiconductor chip;
- wherein the conductor means is dedicated to the second semiconductor chip and does not transmit either a signal or power to or from the remainder of the first semiconductor chip.
A multi-chip package comprising:
- a package substrate including a package terminal;
- a first semiconductor chip including circuitry attached to the package substrate at a first surface of the first semiconductor chip, the first semiconductor chip including a plurality of conductor lines each insulated from the remainder of the first semiconductor chip;
- a second semiconductor chip including circuitry and a chip terminal in communication with the circuitry of the second semiconductor chip, the second semiconductor chip attached to the second surface of the first semiconductor chip opposite the first surface;
- and
- an electrical connection from the chip terminal of the second semiconductor chip to the package terminal, the electrical connection including one of the plurality of conductor lines of the first semiconductor chip.
A semiconductor chip comprising:
- a semiconductor substrate;
- a circuit on the substrate;
- an insulating layer formed on the circuit;
- and
- a plurality of electrically floating conductor lines formed on the insulating layer, at a major surface of the semiconductor chip.
Dependencies are inferred from the claim text.