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US 2011/0031626 A1Published application
Metal wiring of semiconductor device and forming method thereof
AssigneeHynix Semiconductor Inc.
InventorKang Tae PARK
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Abstract
The present invention relates to a metal wiring of a semiconductor device and a method for the same, and is directed to disclose a technique forming an additional conductive layer within the metal line, which acts as an etching barrier to increase the etching margin and to improve the RC characteristics between the metal lines, which can prevent the Cu migration.
Claims14
A method for forming a metal wiring for a semiconductor device, the method comprising:
- forming a first level of metal layer over a substrate,
- forming a second level of metal layer over the first level of metal layer;
- and
- forming a first contact plug electrically coupling the first and the second levels of metal layers,
- wherein the first level of metal layer includes:
- a first metal line;
- a first conductive layer formed over the first metal line;
- and
- a second metal line formed over the first conductive layer.
6 more elements
A semiconductor device, comprising:
- a first level of metal layer formed over a substrate;
- a second level of metal layer formed over the first level of metal layer;
- and
- a first contact plug electrically coupling the first and the second level of metal layers,
- wherein the first level of metal layer includes:
- a first metal line formed over a semiconductor substrate;
- to a first conductive layer formed over the first metal line;
- and
- a second metal line formed over the first conductive layer.
6 more elements
Dependencies are inferred from the claim text.