Semiconductor devices having stress relief layers and methods for fabricating the same

A method of fabricating a semiconductor device comprising the steps of:

• providing a semiconductor die having a first conductive terminal;
• providing a packaging substrate having a second conductive terminal;
• forming a first stress-relief layer in electrical communication with the first conductive terminal;
• forming an interconnecting structure having a first end coupled to the first stress-relief layer, and having a second end;
• forming a second stress-relief layer on the second conductive terminal;
• and
• electrically and physically coupling the second stress-relief layer to the second end of the interconnecting structure.

An electronic device comprising:

• a packaging substrate;
• a semiconductor die having a conductive terminal;
• a first stress-relief layer in electrical communication with the conductive terminal;
• and
• an interconnecting structure having a first end electrically and physically coupled to the first stress-relief layer, and having a second end electrically and physically coupled to the packaging substrate.