Sealing layer of a field effect transistor
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYu Chao LIN, Jr Jung LIN, Yih-Ann LIN, Jih-Jse LIN, Chao-Cheng CHEN, Ryan Chia-Jen CHEN, Weng CHANG
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Abstract
An exemplary structure for a gate structure of a field effect transistor comprises a gate electrode; a gate insulator under the gate electrode having footing regions on opposing sides of the gate electrode; and a sealing layer on sidewalls of the gate structure, wherein a thickness of lower portion of the sealing layer overlying the footing regions is less than a thickness of upper portion of the sealing layer on sidewalls of the gate electrode, whereby the field effect transistor made has almost no recess in the substrate surface.
Claims20
A gate structure of a field effect transistor comprising:
- a gate electrode;
- a gate insulator under the gate electrode having footing regions on opposing sides of the gate electrode;
- and
- a sealing layer on sidewalls of the gate structure, wherein a thickness of lower portion of the sealing layer overlying the footing regions is less than a thickness of an upper portion of the sealing layer on sidewalls of the gate electrode.
A field effect transistor comprising:
- a substrate comprising an active region;
- a gate structure comprising a gate electrode and a gate insulator under the gate electrode having footing regions on opposing sides of the gate electrode;
- a sealing layer on sidewalls of the gate structure, wherein a thickness of lower portion of the sealing layer overlying the footing regions is less than a thickness of an upper portion of the sealing layer on sidewalls of the gate electrode;
- and
- source and drain regions in the active region on opposite sides of the gate structure.
Dependencies are inferred from the claim text.