Semiconductor device and manufacturing method thereof

A manufacturing method of a semiconductor device comprising the steps of:

• (a) preparing a SOI substrate having a substrate layer, a buried insulating layer formed over the substrate layer, and a semiconductor layer formed over the buried insulating layer;
• (b) introducing a conductivity type impurity into the substrate layer of the SOI substrate, thereby forming in the substrate layer a first semiconductor region contiguous to the buried insulating layer;
• and
• (c) forming a first MISFET in a first region of the SOI substrate,
• wherein the step (c) comprises the steps of:
• (c1) processing the semiconductor layer of the SOI substrate to form a fin in a rectangular solid form with a long side in a first direction, a first source region to be coupled to one end of the fin, and a first drain region to be coupled to another end of the fin;
• (c2) forming a first gate insulating film over the surface of the fin;
• (c3) forming, over the SOI substrate having the fin formed thereon, a first conductor film covering the fin therewith;
• (c4) processing the first conductor film to form a first gate electrode that straddles over the surface of the fin via the first gate insulating film in a region extending in a second direction intersecting with the first direction and at the same time intersecting with the fin;
• and
• (c5) introducing a conductivity type impurity into the first source region and the first drain region,
• wherein a ratio of the height of the fin formed in the step (c) to the width of the fin, which is a width in the second direction of the fin is 1 or greater but not greater than 2.

A manufacturing method of a semiconductor device having a first MISFET in a first region and a second MISFET in a second region, comprising the steps of:

• (a) preparing a SOI substrate having a substrate layer, a buried insulating layer formed over the substrate layer, and a semiconductor layer formed over the buried insulating layer;
• (b) removing the semiconductor layer and the buried insulating layer formed in the second region of the SOI substrate to expose the substrate layer;
• (c) introducing a conductivity type impurity into the substrate layer formed in the first region of the SOI substrate to form a first semiconductor region contiguous to the buried insulating layer in the substrate layer formed in the first region;
• and
• (d) forming the first MISFET in the first region and forming the second MISFET in the second region,
• wherein the step (d) comprises the steps of:
• (d1) processing the semiconductor layer of the SOI substrate in the first region to form a fin in a rectangular solid form with a long side in a first direction, a first source region to be coupled to one end of the fin, and a first drain region to be coupled to another end of the fin;
• (d2) forming a first gate insulating film over the surface of the fin formed in the first region and forming a second gate insulating film over the substrate layer formed in the second region;
• (d3) forming a first conductor film over the SOI substrate having the fin formed thereover so as to cover the fin in the first region, while forming the first conductor film over the second gate insulating film in the second region;
• (d4) processing the first conductor film formed in the first region to form a first gate electrode straddling over the surface of the fin via the first gate insulating film in a region extending in a second direction intersecting with the first direction and at the same time, intersecting with the fin, while processing the first conductor film formed in the second region to form a second gate electrode over the second gate insulating film;
• (d5) introducing a conductivity type impurity into the first source region and the first drain region formed in the first region;
• and
• (d6) introducing a conductivity type impurity into the substrate layer formed in the second region to form a second source region and a second drain region,
• wherein a ratio of the height of the fin formed in the step (d1) to the width of the fin, which is a width in the second direction, is 1 or greater but not greater than 2.